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<title>Static Call Graph - [..\..\Output\Template.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image ..\..\Output\Template.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Thu Jun 09 12:56:20 2022
<BR><P>
<H3>Maximum Stack Usage =        120 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main &rArr; eMBInit &rArr; eMBRTUInit &rArr; xMBPortTimersInit &rArr; NVIC_Init
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1c]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[1c]">ADC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4]">BusFault_Handler</a> from stm32f4xx_it.o(i.BusFault_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1e]">CAN1_RX0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1d]">CAN1_TX_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4a]">CAN2_RX0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4b]">CAN2_RX1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4c]">CAN2_SCE_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[49]">CAN2_TX_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[59]">CRYP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[58]">DCMI_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[15]">DMA1_Stream0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[16]">DMA1_Stream1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[17]">DMA1_Stream2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[18]">DMA1_Stream3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[19]">DMA1_Stream4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1a]">DMA1_Stream5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1b]">DMA1_Stream6_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[39]">DMA1_Stream7_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[42]">DMA2_Stream0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[43]">DMA2_Stream1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[44]">DMA2_Stream2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[45]">DMA2_Stream3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[46]">DMA2_Stream4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4e]">DMA2_Stream5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4f]">DMA2_Stream6_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[50]">DMA2_Stream7_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[7]">DebugMon_Handler</a> from stm32f4xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[47]">ETH_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[48]">ETH_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5b]">FPU_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3a]">FSMC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5a]">HASH_RNG_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2]">HardFault_Handler</a> from stm32f4xx_it.o(i.HardFault_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[53]">I2C3_ER_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[52]">I2C3_EV_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3]">MemManage_Handler</a> from stm32f4xx_it.o(i.MemManage_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from stm32f4xx_it.o(i.NMI_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4d]">OTG_FS_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[34]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[55]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[54]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[57]">OTG_HS_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[56]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[8]">PendSV_Handler</a> from stm32f4xx_it.o(i.PendSV_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3d]">SPI3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[6]">SVC_Handler</a> from stm32f4xx_it.o(i.SVC_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[9]">SysTick_Handler</a> from stm32f4xx_it.o(i.SysTick_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5d]">SystemInit</a> from system_stm32f4xx.o(i.SystemInit) referenced from startup_stm32f40xx.o(.text)
 <LI><a href="#[c]">TAMP_STAMP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[22]">TIM1_BRK_TIM9_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[24]">TIM1_TRG_COM_TIM11_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[23]">TIM1_UP_TIM10_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[26]">TIM2_IRQHandler</a> from porttimer.o(i.TIM2_IRQHandler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3c]">TIM5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[40]">TIM6_DAC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[41]">TIM7_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[35]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[38]">TIM8_CC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[37]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[36]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3e]">UART4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3f]">UART5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2f]">USART1_IRQHandler</a> from portserial.o(i.USART1_IRQHandler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[30]">USART2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[51]">USART6_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5]">UsageFault_Handler</a> from stm32f4xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5e]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f40xx.o(.text)
 <LI><a href="#[69]">eMBASCIIReceive</a> from mbascii.o(i.eMBASCIIReceive) referenced from mb.o(i.eMBInit)
 <LI><a href="#[68]">eMBASCIISend</a> from mbascii.o(i.eMBASCIISend) referenced from mb.o(i.eMBInit)
 <LI><a href="#[66]">eMBASCIIStart</a> from mbascii.o(i.eMBASCIIStart) referenced from mb.o(i.eMBInit)
 <LI><a href="#[67]">eMBASCIIStop</a> from mbascii.o(i.eMBASCIIStop) referenced from mb.o(i.eMBInit)
 <LI><a href="#[73]">eMBFuncReadCoils</a> from mbfunccoils.o(i.eMBFuncReadCoils) referenced from mb.o(.data)
 <LI><a href="#[76]">eMBFuncReadDiscreteInputs</a> from mbfuncdisc.o(i.eMBFuncReadDiscreteInputs) referenced from mb.o(.data)
 <LI><a href="#[6f]">eMBFuncReadHoldingRegister</a> from mbfuncholding.o(i.eMBFuncReadHoldingRegister) referenced from mb.o(.data)
 <LI><a href="#[6e]">eMBFuncReadInputRegister</a> from mbfuncinput.o(i.eMBFuncReadInputRegister) referenced from mb.o(.data)
 <LI><a href="#[72]">eMBFuncReadWriteMultipleHoldingRegister</a> from mbfuncholding.o(i.eMBFuncReadWriteMultipleHoldingRegister) referenced from mb.o(.data)
 <LI><a href="#[6d]">eMBFuncReportSlaveID</a> from mbfuncother.o(i.eMBFuncReportSlaveID) referenced from mb.o(.data)
 <LI><a href="#[74]">eMBFuncWriteCoil</a> from mbfunccoils.o(i.eMBFuncWriteCoil) referenced from mb.o(.data)
 <LI><a href="#[71]">eMBFuncWriteHoldingRegister</a> from mbfuncholding.o(i.eMBFuncWriteHoldingRegister) referenced from mb.o(.data)
 <LI><a href="#[75]">eMBFuncWriteMultipleCoils</a> from mbfunccoils.o(i.eMBFuncWriteMultipleCoils) referenced from mb.o(.data)
 <LI><a href="#[70]">eMBFuncWriteMultipleHoldingRegister</a> from mbfuncholding.o(i.eMBFuncWriteMultipleHoldingRegister) referenced from mb.o(.data)
 <LI><a href="#[62]">eMBRTUReceive</a> from mbrtu.o(i.eMBRTUReceive) referenced from mb.o(i.eMBInit)
 <LI><a href="#[61]">eMBRTUSend</a> from mbrtu.o(i.eMBRTUSend) referenced from mb.o(i.eMBInit)
 <LI><a href="#[5f]">eMBRTUStart</a> from mbrtu.o(i.eMBRTUStart) referenced from mb.o(i.eMBInit)
 <LI><a href="#[60]">eMBRTUStop</a> from mbrtu.o(i.eMBRTUStop) referenced from mb.o(i.eMBInit)
 <LI><a href="#[5c]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
 <LI><a href="#[6a]">xMBASCIIReceiveFSM</a> from mbascii.o(i.xMBASCIIReceiveFSM) referenced from mb.o(i.eMBInit)
 <LI><a href="#[6c]">xMBASCIITimerT1SExpired</a> from mbascii.o(i.xMBASCIITimerT1SExpired) referenced from mb.o(i.eMBInit)
 <LI><a href="#[6b]">xMBASCIITransmitFSM</a> from mbascii.o(i.xMBASCIITransmitFSM) referenced from mb.o(i.eMBInit)
 <LI><a href="#[63]">xMBRTUReceiveFSM</a> from mbrtu.o(i.xMBRTUReceiveFSM) referenced from mb.o(i.eMBInit)
 <LI><a href="#[65]">xMBRTUTimerT35Expired</a> from mbrtu.o(i.xMBRTUTimerT35Expired) referenced from mb.o(i.eMBInit)
 <LI><a href="#[64]">xMBRTUTransmitFSM</a> from mbrtu.o(i.xMBRTUTransmitFSM) referenced from mb.o(i.eMBInit)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[5e]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(.text)
</UL>
<P><STRONG><a name="[b7]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[77]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[79]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[b8]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[b9]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[ba]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[bb]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

<P><STRONG><a name="[bc]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[59]"></a>CRYP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[58]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[45]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[5b]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>FSMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[5a]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[57]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[56]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_TIM9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_TIM11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_TIM10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3e]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[9d]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReportSlaveID
</UL>

<P><STRONG><a name="[bd]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[be]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[78]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[bf]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[a6]"></a>AppFMD_RdCoils</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, mb.o(i.AppFMD_RdCoils))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = AppFMD_RdCoils
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegCoilsCB
</UL>

<P><STRONG><a name="[a7]"></a>AppFMD_WrCoils</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, mb.o(i.AppFMD_WrCoils))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = AppFMD_WrCoils
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegCoilsCB
</UL>

<P><STRONG><a name="[a9]"></a>AppFMD_WrRegs</STRONG> (Thumb, 8 bytes, Stack size 12 bytes, mb.o(i.AppFMD_WrRegs))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = AppFMD_WrRegs
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegHoldingCB
</UL>

<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.BusFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[7a]"></a>Debug_USART_Config</STRONG> (Thumb, 178 bytes, Stack size 32 bytes, bsp_debug_usart.o(i.Debug_USART_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = Debug_USART_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
<LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
<LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
<LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearFlag
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[7d]"></a>GPIO_Init</STRONG> (Thumb, 144 bytes, Stack size 20 bytes, stm32f4xx_gpio.o(i.GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[7e]"></a>GPIO_PinAFConfig</STRONG> (Thumb, 70 bytes, Stack size 20 bytes, stm32f4xx_gpio.o(i.GPIO_PinAFConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GPIO_PinAFConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.HardFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.MemManage_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.NMI_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[85]"></a>NVIC_Init</STRONG> (Thumb, 106 bytes, Stack size 16 bytes, misc.o(i.NVIC_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = NVIC_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
<LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration
</UL>

<P><STRONG><a name="[84]"></a>NVIC_PriorityGroupConfig</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, misc.o(i.NVIC_PriorityGroupConfig))
<BR><BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration
</UL>

<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[7b]"></a>RCC_AHB1PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_AHB1PeriphClockCmd))
<BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[b4]"></a>RCC_APB1PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd))
<BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
</UL>

<P><STRONG><a name="[7c]"></a>RCC_APB2PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd))
<BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[90]"></a>RCC_GetClocksFreq</STRONG> (Thumb, 214 bytes, Stack size 20 bytes, stm32f4xx_rcc.o(i.RCC_GetClocksFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = RCC_GetClocksFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
</UL>

<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, stm32f4xx_it.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
</UL>
<BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TimingDelay_Decrement
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[aa]"></a>SysTick_Init</STRONG> (Thumb, 88 bytes, Stack size 12 bytes, bsp_systick.o(i.SysTick_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SysTick_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[5d]"></a>SystemInit</STRONG> (Thumb, 88 bytes, Stack size 8 bytes, system_stm32f4xx.o(i.SystemInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SystemInit &rArr; SetSysClock
</UL>
<BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(.text)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, porttimer.o(i.TIM2_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM2_IRQHandler &rArr; TIM_GetITStatus
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvvTIMERExpiredISR
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[b6]"></a>TIM_ARRPreloadConfig</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ARRPreloadConfig))
<BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
</UL>

<P><STRONG><a name="[89]"></a>TIM_ClearITPendingBit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ClearITPendingBit))
<BR><BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM2_IRQHandler
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
</UL>

<P><STRONG><a name="[ae]"></a>TIM_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_Cmd))
<BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
</UL>

<P><STRONG><a name="[88]"></a>TIM_GetITStatus</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, stm32f4xx_tim.o(i.TIM_GetITStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_GetITStatus
</UL>
<BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM2_IRQHandler
</UL>

<P><STRONG><a name="[ac]"></a>TIM_ITConfig</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ITConfig))
<BR><BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
</UL>

<P><STRONG><a name="[ad]"></a>TIM_SetCounter</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_SetCounter))
<BR><BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
</UL>

<P><STRONG><a name="[b5]"></a>TIM_TimeBaseInit</STRONG> (Thumb, 104 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_TimeBaseInit))
<BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
</UL>

<P><STRONG><a name="[86]"></a>TimingDelay_Decrement</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, bsp_systick.o(i.TimingDelay_Decrement))
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, portserial.o(i.USART1_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART1_IRQHandler &rArr; USART_GetITStatus
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvvUARTTxReadyISR
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvvUARTRxISR
<LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
<LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[82]"></a>USART_ClearFlag</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ClearFlag))
<BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[8c]"></a>USART_ClearITPendingBit</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32f4xx_usart.o(i.USART_ClearITPendingBit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = USART_ClearITPendingBit
</UL>
<BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[83]"></a>USART_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_Cmd))
<BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[8e]"></a>USART_GetFlagStatus</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_GetFlagStatus))
<BR><BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[8b]"></a>USART_GetITStatus</STRONG> (Thumb, 84 bytes, Stack size 16 bytes, stm32f4xx_usart.o(i.USART_GetITStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART_GetITStatus
</UL>
<BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[81]"></a>USART_ITConfig</STRONG> (Thumb, 74 bytes, Stack size 20 bytes, stm32f4xx_usart.o(i.USART_ITConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = USART_ITConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[7f]"></a>USART_Init</STRONG> (Thumb, 204 bytes, Stack size 48 bytes, stm32f4xx_usart.o(i.USART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = USART_Init &rArr; RCC_GetClocksFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[b2]"></a>USART_ReceiveData</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ReceiveData))
<BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialGetByte
</UL>

<P><STRONG><a name="[b3]"></a>USART_SendData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_SendData))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialPutByte
</UL>

<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.UsageFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[c0]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[c1]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[c2]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

<P><STRONG><a name="[91]"></a>eMBASCIIInit</STRONG> (Thumb, 60 bytes, Stack size 24 bytes, mbascii.o(i.eMBASCIIInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = eMBASCIIInit &rArr; xMBPortTimersInit &rArr; NVIC_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialInit
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBInit
</UL>

<P><STRONG><a name="[69]"></a>eMBASCIIReceive</STRONG> (Thumb, 68 bytes, Stack size 24 bytes, mbascii.o(i.eMBASCIIReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = eMBASCIIReceive &rArr; prvucMBLRC
</UL>
<BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvucMBLRC
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[68]"></a>eMBASCIISend</STRONG> (Thumb, 102 bytes, Stack size 24 bytes, mbascii.o(i.eMBASCIISend))
<BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = eMBASCIISend &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
<LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvucMBLRC
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[66]"></a>eMBASCIIStart</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, mbascii.o(i.eMBASCIIStart))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = eMBASCIIStart &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventPost
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[67]"></a>eMBASCIIStop</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, mbascii.o(i.eMBASCIIStop))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = eMBASCIIStop &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[ab]"></a>eMBEnable</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, mb.o(i.eMBEnable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = eMBEnable
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[73]"></a>eMBFuncReadCoils</STRONG> (Thumb, 174 bytes, Stack size 40 bytes, mbfunccoils.o(i.eMBFuncReadCoils))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = eMBFuncReadCoils &rArr; eMBRegCoilsCB &rArr; AppFMD_WrCoils
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegCoilsCB
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[76]"></a>eMBFuncReadDiscreteInputs</STRONG> (Thumb, 172 bytes, Stack size 40 bytes, mbfuncdisc.o(i.eMBFuncReadDiscreteInputs))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = eMBFuncReadDiscreteInputs
</UL>
<BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegDiscreteCB
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[6f]"></a>eMBFuncReadHoldingRegister</STRONG> (Thumb, 140 bytes, Stack size 32 bytes, mbfuncholding.o(i.eMBFuncReadHoldingRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = eMBFuncReadHoldingRegister &rArr; eMBRegHoldingCB &rArr; AppFMD_WrRegs
</UL>
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegHoldingCB
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[6e]"></a>eMBFuncReadInputRegister</STRONG> (Thumb, 140 bytes, Stack size 32 bytes, mbfuncinput.o(i.eMBFuncReadInputRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = eMBFuncReadInputRegister &rArr; eMBRegInputCB
</UL>
<BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegInputCB
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[72]"></a>eMBFuncReadWriteMultipleHoldingRegister</STRONG> (Thumb, 212 bytes, Stack size 48 bytes, mbfuncholding.o(i.eMBFuncReadWriteMultipleHoldingRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = eMBFuncReadWriteMultipleHoldingRegister &rArr; eMBRegHoldingCB &rArr; AppFMD_WrRegs
</UL>
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegHoldingCB
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[6d]"></a>eMBFuncReportSlaveID</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, mbfuncother.o(i.eMBFuncReportSlaveID))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = eMBFuncReportSlaveID
</UL>
<BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[74]"></a>eMBFuncWriteCoil</STRONG> (Thumb, 112 bytes, Stack size 32 bytes, mbfunccoils.o(i.eMBFuncWriteCoil))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = eMBFuncWriteCoil &rArr; eMBRegCoilsCB &rArr; AppFMD_WrCoils
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegCoilsCB
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[71]"></a>eMBFuncWriteHoldingRegister</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, mbfuncholding.o(i.eMBFuncWriteHoldingRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = eMBFuncWriteHoldingRegister &rArr; eMBRegHoldingCB &rArr; AppFMD_WrRegs
</UL>
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegHoldingCB
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[75]"></a>eMBFuncWriteMultipleCoils</STRONG> (Thumb, 144 bytes, Stack size 40 bytes, mbfunccoils.o(i.eMBFuncWriteMultipleCoils))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = eMBFuncWriteMultipleCoils &rArr; eMBRegCoilsCB &rArr; AppFMD_WrCoils
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegCoilsCB
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[70]"></a>eMBFuncWriteMultipleHoldingRegister</STRONG> (Thumb, 110 bytes, Stack size 32 bytes, mbfuncholding.o(i.eMBFuncWriteMultipleHoldingRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = eMBFuncWriteMultipleHoldingRegister &rArr; eMBRegHoldingCB &rArr; AppFMD_WrRegs
</UL>
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegHoldingCB
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prveMBError2Exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(.data)
</UL>
<P><STRONG><a name="[9e]"></a>eMBInit</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, mb.o(i.eMBInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = eMBInit &rArr; eMBRTUInit &rArr; xMBPortTimersInit &rArr; NVIC_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventInit
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUInit
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIInit
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[a1]"></a>eMBPoll</STRONG> (Thumb, 268 bytes, Stack size 16 bytes, mb.o(i.eMBPoll))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = eMBPoll
</UL>
<BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventGet
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventPost
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[9f]"></a>eMBRTUInit</STRONG> (Thumb, 76 bytes, Stack size 32 bytes, mbrtu.o(i.eMBRTUInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = eMBRTUInit &rArr; xMBPortTimersInit &rArr; NVIC_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortTimersInit
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialInit
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBInit
</UL>

<P><STRONG><a name="[62]"></a>eMBRTUReceive</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, mbrtu.o(i.eMBRTUReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = eMBRTUReceive &rArr; usMBCRC16
</UL>
<BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usMBCRC16
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[61]"></a>eMBRTUSend</STRONG> (Thumb, 146 bytes, Stack size 24 bytes, mbrtu.o(i.eMBRTUSend))
<BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = eMBRTUSend &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usMBCRC16
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialPutByte
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[5f]"></a>eMBRTUStart</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, mbrtu.o(i.eMBRTUStart))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = eMBRTUStart &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[60]"></a>eMBRTUStop</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, mbrtu.o(i.eMBRTUStop))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = eMBRTUStop &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[98]"></a>eMBRegCoilsCB</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, mb.o(i.eMBRegCoilsCB))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = eMBRegCoilsCB &rArr; AppFMD_WrCoils
</UL>
<BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AppFMD_WrCoils
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AppFMD_RdCoils
</UL>
<BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteMultipleCoils
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteCoil
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadCoils
</UL>

<P><STRONG><a name="[9a]"></a>eMBRegDiscreteCB</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, mb.o(i.eMBRegDiscreteCB))
<BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadDiscreteInputs
</UL>

<P><STRONG><a name="[9b]"></a>eMBRegHoldingCB</STRONG> (Thumb, 58 bytes, Stack size 32 bytes, mb.o(i.eMBRegHoldingCB))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = eMBRegHoldingCB &rArr; AppFMD_WrRegs
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AppFMD_WrRegs
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AppFMD_RdRegs
</UL>
<BR>[Called By]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteMultipleHoldingRegister
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteHoldingRegister
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadWriteMultipleHoldingRegister
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadHoldingRegister
</UL>

<P><STRONG><a name="[9c]"></a>eMBRegInputCB</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, mb.o(i.eMBRegInputCB))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = eMBRegInputCB
</UL>
<BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadInputRegister
</UL>

<P><STRONG><a name="[5c]"></a>main</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = main &rArr; eMBInit &rArr; eMBRTUInit &rArr; xMBPortTimersInit &rArr; NVIC_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBPoll
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBInit
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBEnable
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Init
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[99]"></a>prveMBError2Exception</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, mbutils.o(i.prveMBError2Exception))
<BR><BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadInputRegister
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteMultipleHoldingRegister
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteHoldingRegister
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadWriteMultipleHoldingRegister
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadHoldingRegister
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadDiscreteInputs
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteMultipleCoils
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncWriteCoil
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBFuncReadCoils
</UL>

<P><STRONG><a name="[a3]"></a>usMBCRC16</STRONG> (Thumb, 48 bytes, Stack size 16 bytes, mbcrc.o(i.usMBCRC16))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = usMBCRC16
</UL>
<BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUSend
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUReceive
</UL>

<P><STRONG><a name="[95]"></a>vMBPortSerialEnable</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, portserial.o(i.vMBPortSerialEnable))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUTransmitFSM
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUStop
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUStart
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUSend
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIITransmitFSM
<LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIStop
<LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIStart
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIISend
</UL>

<P><STRONG><a name="[97]"></a>vMBPortTimersDisable</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, porttimer.o(i.vMBPortTimersDisable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = vMBPortTimersDisable
</UL>
<BR>[Calls]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetCounter
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITConfig
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUTimerT35Expired
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUStop
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIITimerT1SExpired
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIIReceiveFSM
<LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIStop
</UL>

<P><STRONG><a name="[a5]"></a>vMBPortTimersEnable</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, porttimer.o(i.vMBPortTimersEnable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = vMBPortTimersEnable
</UL>
<BR>[Calls]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetCounter
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITConfig
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit
</UL>
<BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUReceiveFSM
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUStart
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIIReceiveFSM
</UL>

<P><STRONG><a name="[6a]"></a>xMBASCIIReceiveFSM</STRONG> (Thumb, 276 bytes, Stack size 16 bytes, mbascii.o(i.xMBASCIIReceiveFSM))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = xMBASCIIReceiveFSM &rArr; xMBPortSerialGetByte
</UL>
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialGetByte
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventPost
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvucMBCHAR2BIN
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[6c]"></a>xMBASCIITimerT1SExpired</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, mbascii.o(i.xMBASCIITimerT1SExpired))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xMBASCIITimerT1SExpired &rArr; vMBPortTimersDisable
</UL>
<BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[6b]"></a>xMBASCIITransmitFSM</STRONG> (Thumb, 220 bytes, Stack size 16 bytes, mbascii.o(i.xMBASCIITransmitFSM))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = xMBASCIITransmitFSM &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialPutByte
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventPost
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvucMBBIN2CHAR
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[a2]"></a>xMBPortEventGet</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, portevent.o(i.xMBPortEventGet))
<BR><BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBPoll
</UL>

<P><STRONG><a name="[a0]"></a>xMBPortEventInit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, portevent.o(i.xMBPortEventInit))
<BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBInit
</UL>

<P><STRONG><a name="[96]"></a>xMBPortEventPost</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, portevent.o(i.xMBPortEventPost))
<BR><BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUTransmitFSM
<LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUTimerT35Expired
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIITransmitFSM
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIIReceiveFSM
<LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIStart
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBPoll
</UL>

<P><STRONG><a name="[af]"></a>xMBPortSerialGetByte</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, portserial.o(i.xMBPortSerialGetByte))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xMBPortSerialGetByte
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData
</UL>
<BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUReceiveFSM
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIIReceiveFSM
</UL>

<P><STRONG><a name="[92]"></a>xMBPortSerialInit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, portserial.o(i.xMBPortSerialInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = xMBPortSerialInit
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUInit
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIInit
</UL>

<P><STRONG><a name="[a4]"></a>xMBPortSerialPutByte</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, portserial.o(i.xMBPortSerialPutByte))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = xMBPortSerialPutByte
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_SendData
</UL>
<BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBRTUTransmitFSM
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUSend
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIITransmitFSM
</UL>

<P><STRONG><a name="[93]"></a>xMBPortTimersInit</STRONG> (Thumb, 116 bytes, Stack size 32 bytes, porttimer.o(i.xMBPortTimersInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = xMBPortTimersInit &rArr; NVIC_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ARRPreloadConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRTUInit
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIInit
</UL>

<P><STRONG><a name="[63]"></a>xMBRTUReceiveFSM</STRONG> (Thumb, 122 bytes, Stack size 16 bytes, mbrtu.o(i.xMBRTUReceiveFSM))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = xMBRTUReceiveFSM &rArr; xMBPortSerialGetByte
</UL>
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialGetByte
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[65]"></a>xMBRTUTimerT35Expired</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, mbrtu.o(i.xMBRTUTimerT35Expired))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xMBRTUTimerT35Expired &rArr; vMBPortTimersDisable
</UL>
<BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventPost
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortTimersDisable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL>
<P><STRONG><a name="[64]"></a>xMBRTUTransmitFSM</STRONG> (Thumb, 94 bytes, Stack size 8 bytes, mbrtu.o(i.xMBRTUTransmitFSM))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = xMBRTUTransmitFSM &rArr; vMBPortSerialEnable &rArr; USART_ITConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortSerialPutByte
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBPortEventPost
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vMBPortSerialEnable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> mb.o(i.eMBInit)
</UL><P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[87]"></a>SetSysClock</STRONG> (Thumb, 220 bytes, Stack size 12 bytes, system_stm32f4xx.o(i.SetSysClock))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SetSysClock
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
</UL>

<P><STRONG><a name="[80]"></a>NVIC_Configuration</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, bsp_debug_usart.o(i.NVIC_Configuration))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = NVIC_Configuration &rArr; NVIC_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_PriorityGroupConfig
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[b1]"></a>prvucMBBIN2CHAR</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, mbascii.o(i.prvucMBBIN2CHAR))
<BR><BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIITransmitFSM
</UL>

<P><STRONG><a name="[b0]"></a>prvucMBCHAR2BIN</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, mbascii.o(i.prvucMBCHAR2BIN))
<BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xMBASCIIReceiveFSM
</UL>

<P><STRONG><a name="[94]"></a>prvucMBLRC</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, mbascii.o(i.prvucMBLRC))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = prvucMBLRC
</UL>
<BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIISend
<LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBASCIIReceive
</UL>

<P><STRONG><a name="[a8]"></a>AppFMD_RdRegs</STRONG> (Thumb, 18 bytes, Stack size 12 bytes, mb.o(i.AppFMD_RdRegs))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = AppFMD_RdRegs
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;eMBRegHoldingCB
</UL>

<P><STRONG><a name="[8d]"></a>prvvUARTRxISR</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, portserial.o(i.prvvUARTRxISR))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = prvvUARTRxISR
</UL>
<BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[8f]"></a>prvvUARTTxReadyISR</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, portserial.o(i.prvvUARTTxReadyISR))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = prvvUARTTxReadyISR
</UL>
<BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[8a]"></a>prvvTIMERExpiredISR</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, porttimer.o(i.prvvTIMERExpiredISR))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = prvvTIMERExpiredISR
</UL>
<BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM2_IRQHandler
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
